docs/example/example_end_collisions
Region collision with diagram max address
docs/example/example_end_collisions.json 
{
  "bgcolour": [
    248,
    248,
    248
  ],
  "link_alpha": 96,
  "link_fill_colour": "red",
  "link_line_colour": "red",
  "legend_width": 30,
  "memory_maps": {
    "Untitled": {
      "memory_regions": {
        "kernel": {
          "origin": 16,
          "size": 48,
          "links": [],
          "freespace": 16,
          "collisions": {}
        },
        "rootfs": {
          "origin": 80,
          "size": 48,
          "links": [],
          "freespace": 272,
          "collisions": {}
        },
        "dtb": {
          "origin": 400,
          "size": 48,
          "links": [],
          "freespace": -11,
          "collisions": {
            "end": 437
          }
        }
      },
      "max_address": 437
    }
  },
  "name": "Diagram",
  "height": 437,
  "indent_scheme": "alternate",
  "region_alpha": 192,
  "threshold": 200,
  "title_fill_colour": [
    224,
    224,
    224
  ],
  "title_line_colour": [
    32,
    32,
    32
  ],
  "void_fill_colour": "white",
  "void_line_colour": [
    192,
    192,
    192
  ],
  "width": 614
}

docs/example/example_region_collisions
Region collisions with other regions
docs/example/example_region_collisions.json 
{
  "bgcolour": [
    248,
    248,
    248
  ],
  "link_alpha": 96,
  "link_fill_colour": "red",
  "link_line_colour": "red",
  "legend_width": 30,
  "memory_maps": {
    "Untitled": {
      "memory_regions": {
        "kernel": {
          "origin": 16,
          "size": 96,
          "links": [],
          "freespace": -32,
          "collisions": {
            "rootfs": 80
          }
        },
        "rootfs": {
          "origin": 80,
          "size": 80,
          "links": [],
          "freespace": -16,
          "collisions": {
            "kernel": 80,
            "dtb": 144
          }
        },
        "dtb": {
          "origin": 144,
          "size": 48,
          "links": [],
          "freespace": 245,
          "collisions": {
            "rootfs": 144
          }
        }
      },
      "max_address": 437
    }
  },
  "name": "Diagram",
  "height": 437,
  "indent_scheme": "alternate",
  "region_alpha": 192,
  "threshold": 200,
  "title_fill_colour": [
    224,
    224,
    224
  ],
  "title_line_colour": [
    32,
    32,
    32
  ],
  "void_fill_colour": "white",
  "void_line_colour": [
    192,
    192,
    192
  ],
  "width": 614
}

docs/example/example_two_maps
Diagram with two memory maps
docs/example/example_two_maps.json 
{
  "$schema": "../../mm/schema.json",
  "name": "TestDiagram",
  "height": 437,
  "width": 614,
  "memory_maps": {
    "eMMC": {
      "memory_regions": {
        "Blob1": {
          "origin": "0x10",
          "size": "0x10",
          "links": [
            [
              "DRAM",
              "Blob2"
            ],
            [
              "DRAM",
              "Blob3"
            ]
          ]
        },
        "Blob4": {
          "origin": "0x100",
          "size": "0x30"
        }
      }
    },
    "DRAM": {
      "memory_regions": {
        "Blob2": {
          "origin": "0x10",
          "size": "0x10"
        },
        "Blob3": {
          "origin": "0x50",
          "size": "0x10"
        },
        "Blob5": {
          "origin": "0x30",
          "size": "0x10"
        }
      }
    }
  }
}

docs/example/example_three_maps
Diagram with three memory maps
docs/example/example_three_maps.json 
{
  "$schema": "../../mm/schema.json",
  "name": "TestDiagram",
  "height": 437,
  "width": 614,
  "memory_maps": {
    "eMMC": {
      "memory_regions": {
        "Blob1": {
          "origin": "0x0",
          "size": "0x20",
          "links": [
            [
              "DRAM",
              "Blob2"
            ],
            [
              "DRAM",
              "Blob4"
            ]
          ]
        }
      }
    },
    "DRAM": {
      "memory_regions": {
        "Blob2": {
          "origin": "0x0",
          "size": "0x20"
        },
        "Blob3": {
          "origin": "0x50",
          "size": "0x20"
        },
        "Blob4": {
          "origin": "0x28",
          "size": "0x20"
        },
        "Blob5": {
          "origin": "0x78",
          "size": "0x20"
        }
      }
    },
    "flash": {
      "memory_regions": {
        "Blob6": {
          "origin": "0xa",
          "size": "0x3c"
        },
        "Blob7": {
          "origin": "0x50",
          "size": "0x20",
          "links": [
            [
              "DRAM",
              "Blob3"
            ],
            [
              "DRAM",
              "Blob5"
            ]
          ]
        }
      }
    }
  }
}

docs/example/A3_region_exceeds_height_no_maxaddress_set

- region exceeds diagram height. Output should remain at page size but the drawing ratio will adjust to fit the larger contents Note the ratio is rounded up to nearest integer value.
- Since the max_address was not set it was taken from the diagram height, which means the region collided with the max_address
docs/example/A3_region_exceeds_height_no_maxaddress_set.json 
{
  "$schema": "../../mm/schema.json",
  "name": "ZynqMP",
  "height": 4961,
  "width": 3508,
  "memory_maps": {
    "Global System Address Map": {
      "memory_regions": {
        "DDR Memory Controller": {
          "origin": "0x10",
          "size": "0x3e8"
        },
        "OCM": {
          "origin": "0x7e0",
          "size": "0x7d0"
        }
      }
    },
    "Flash": {
      "memory_regions": {
        "Boot Image": {
          "origin": "0x0",
          "size": "0xFFFFFF",
          "links": []
        }
      }
    }
  }
}

docs/example/A4_region_exceeds_height_no_maxaddress_set

- region exceeds diagram height. Output should remain at page size but the drawing ratio will adjust to fit the larger contents Note the ratio is rounded up to nearest integer value.
- Since the max_address was not set it was taken from the diagram height, which means the region collided with the max_address
docs/example/A4_region_exceeds_height_no_maxaddress_set.json 
{
  "$schema": "../../mm/schema.json",
  "name": "ZynqMP",
  "height": 3508,
  "width": 2480,
  "memory_maps": {
    "Global System Address Map": {
      "memory_regions": {
        "DDR Memory Controller": {
          "origin": "0x10",
          "size": "0x3e8"
        },
        "OCM": {
          "origin": "0x7e0",
          "size": "0x7d0"
        }
      }
    },
    "Flash": {
      "memory_regions": {
        "Boot Image": {
          "origin": "0x0",
          "size": "0xFFFFFF",
          "links": []
        }
      }
    }
  }
}

docs/example/A5_region_exceeds_height_no_maxaddress_set

- region exceeds diagram height. Output should remain at page size but the drawing ratio will adjust to fit the larger contents Note the ratio is rounded up to nearest integer value.
- Since the max_address was not set it was taken from the diagram height, which means the region collided with the max_address
docs/example/A5_region_exceeds_height_no_maxaddress_set.json 
{
  "$schema": "../../mm/schema.json",
  "name": "ZynqMP",
  "height": 2480,
  "width": 1748,
  "memory_maps": {
    "Global System Address Map": {
      "memory_regions": {
        "DDR Memory Controller": {
          "origin": "0x10",
          "size": "0x3e8"
        },
        "OCM": {
          "origin": "0x7e0",
          "size": "0x7d0"
        }
      }
    },
    "Flash": {
      "memory_regions": {
        "Boot Image": {
          "origin": "0x0",
          "size": "0xFFFFFF",
          "links": []
        }
      }
    }
  }
}

docs/example/A6_region_exceeds_height_no_maxaddress_set

- region exceeds diagram height. Output should remain at page size but the drawing ratio will adjust to fit the larger contents Note the ratio is rounded up to nearest integer value.
- Since the max_address was not set it was taken from the diagram height, which means the region collided with the max_address
docs/example/A6_region_exceeds_height_no_maxaddress_set.json 
{
  "$schema": "../../mm/schema.json",
  "name": "ZynqMP",
  "height": 1748,
  "width": 1240,
  "memory_maps": {
    "Global System Address Map": {
      "memory_regions": {
        "DDR Memory Controller": {
          "origin": "0x10",
          "size": "0x3e8"
        },
        "OCM": {
          "origin": "0x7e0",
          "size": "0x7d0"
        }
      }
    },
    "Flash": {
      "memory_regions": {
        "Boot Image": {
          "origin": "0x0",
          "size": "0xFFFFFF",
          "links": []
        }
      }
    }
  }
}

docs/example/A7_region_exceeds_height_no_maxaddress_set

- region exceeds diagram height. Output should remain at page size but the drawing ratio will adjust to fit the larger contents Note the ratio is rounded up to nearest integer value.
- Since the max_address was not set it was taken from the diagram height, which means the region collided with the max_address
docs/example/A7_region_exceeds_height_no_maxaddress_set.json 
{
  "$schema": "../../mm/schema.json",
  "name": "ZynqMP",
  "height": 1240,
  "width": 874,
  "memory_maps": {
    "Global System Address Map": {
      "memory_regions": {
        "DDR Memory Controller": {
          "origin": "0x10",
          "size": "0x3e8"
        },
        "OCM": {
          "origin": "0x7e0",
          "size": "0x7d0"
        }
      }
    },
    "Flash": {
      "memory_regions": {
        "Boot Image": {
          "origin": "0x0",
          "size": "0xFFFFFF",
          "links": []
        }
      }
    }
  }
}

docs/example/A8_region_exceeds_height_no_maxaddress_set

- region exceeds diagram height. Output should remain at page size but the drawing ratio will adjust to fit the larger contents Note the ratio is rounded up to nearest integer value.
- Since the max_address was not set it was taken from the diagram height, which means the region collided with the max_address
docs/example/A8_region_exceeds_height_no_maxaddress_set.json 
{
  "$schema": "../../mm/schema.json",
  "name": "ZynqMP",
  "height": 874,
  "width": 614,
  "memory_maps": {
    "Global System Address Map": {
      "memory_regions": {
        "DDR Memory Controller": {
          "origin": "0x10",
          "size": "0x3e8"
        },
        "OCM": {
          "origin": "0x7e0",
          "size": "0x7d0"
        }
      }
    },
    "Flash": {
      "memory_regions": {
        "Boot Image": {
          "origin": "0x0",
          "size": "0xFFFFFF",
          "links": []
        }
      }
    }
  }
}

docs/example/A3_region_freespace_exceeds_height_higher_maxaddress_set

- 'max_address' is now set at a higher value than the max region size. This will cause excessive freespace values to be created (larger than the diagram height). To prevent illegible diagrams, the pre
-calculated value will be used instead. NOTE: draw_scale is adjusted to allow for potential voidregions
docs/example/A3_region_freespace_exceeds_height_higher_maxaddress_set.json 
{
  "$schema": "../../mm/schema.json",
  "name": "ZynqMP",
  "height": 4961,
  "width": 3508,
  "memory_maps": {
    "Global System Address Map": {
      "memory_regions": {
        "DDR Memory Controller": {
          "origin": "0x10",
          "size": "0x3e8"
        },
        "OCM": {
          "origin": "0x7e0",
          "size": "0x7d0"
        }
      },
      "max_address": "0xFFFFFFFF"
    },
    "Flash": {
      "memory_regions": {
        "Boot Image": {
          "origin": "0x0",
          "size": "0xFFFFFF",
          "links": []
        }
      },
      "max_address": "0xFFFFFFFF"
    }
  }
}

docs/example/A4_region_freespace_exceeds_height_higher_maxaddress_set

- 'max_address' is now set at a higher value than the max region size. This will cause excessive freespace values to be created (larger than the diagram height). To prevent illegible diagrams, the pre
-calculated value will be used instead. NOTE: draw_scale is adjusted to allow for potential voidregions
docs/example/A4_region_freespace_exceeds_height_higher_maxaddress_set.json 
{
  "$schema": "../../mm/schema.json",
  "name": "ZynqMP",
  "height": 3508,
  "width": 2480,
  "memory_maps": {
    "Global System Address Map": {
      "memory_regions": {
        "DDR Memory Controller": {
          "origin": "0x10",
          "size": "0x3e8"
        },
        "OCM": {
          "origin": "0x7e0",
          "size": "0x7d0"
        }
      },
      "max_address": "0xFFFFFFFF"
    },
    "Flash": {
      "memory_regions": {
        "Boot Image": {
          "origin": "0x0",
          "size": "0xFFFFFF",
          "links": []
        }
      },
      "max_address": "0xFFFFFFFF"
    }
  }
}

docs/example/A5_region_freespace_exceeds_height_higher_maxaddress_set

- 'max_address' is now set at a higher value than the max region size. This will cause excessive freespace values to be created (larger than the diagram height). To prevent illegible diagrams, the pre
-calculated value will be used instead. NOTE: draw_scale is adjusted to allow for potential voidregions
docs/example/A5_region_freespace_exceeds_height_higher_maxaddress_set.json 
{
  "$schema": "../../mm/schema.json",
  "name": "ZynqMP",
  "height": 2480,
  "width": 1748,
  "memory_maps": {
    "Global System Address Map": {
      "memory_regions": {
        "DDR Memory Controller": {
          "origin": "0x10",
          "size": "0x3e8"
        },
        "OCM": {
          "origin": "0x7e0",
          "size": "0x7d0"
        }
      },
      "max_address": "0xFFFFFFFF"
    },
    "Flash": {
      "memory_regions": {
        "Boot Image": {
          "origin": "0x0",
          "size": "0xFFFFFF",
          "links": []
        }
      },
      "max_address": "0xFFFFFFFF"
    }
  }
}

docs/example/A6_region_freespace_exceeds_height_higher_maxaddress_set

- 'max_address' is now set at a higher value than the max region size. This will cause excessive freespace values to be created (larger than the diagram height). To prevent illegible diagrams, the pre
-calculated value will be used instead. NOTE: draw_scale is adjusted to allow for potential voidregions
docs/example/A6_region_freespace_exceeds_height_higher_maxaddress_set.json 
{
  "$schema": "../../mm/schema.json",
  "name": "ZynqMP",
  "height": 1748,
  "width": 1240,
  "memory_maps": {
    "Global System Address Map": {
      "memory_regions": {
        "DDR Memory Controller": {
          "origin": "0x10",
          "size": "0x3e8"
        },
        "OCM": {
          "origin": "0x7e0",
          "size": "0x7d0"
        }
      },
      "max_address": "0xFFFFFFFF"
    },
    "Flash": {
      "memory_regions": {
        "Boot Image": {
          "origin": "0x0",
          "size": "0xFFFFFF",
          "links": []
        }
      },
      "max_address": "0xFFFFFFFF"
    }
  }
}

docs/example/A7_region_freespace_exceeds_height_higher_maxaddress_set

- 'max_address' is now set at a higher value than the max region size. This will cause excessive freespace values to be created (larger than the diagram height). To prevent illegible diagrams, the pre
-calculated value will be used instead. NOTE: draw_scale is adjusted to allow for potential voidregions
docs/example/A7_region_freespace_exceeds_height_higher_maxaddress_set.json 
{
  "$schema": "../../mm/schema.json",
  "name": "ZynqMP",
  "height": 1240,
  "width": 874,
  "memory_maps": {
    "Global System Address Map": {
      "memory_regions": {
        "DDR Memory Controller": {
          "origin": "0x10",
          "size": "0x3e8"
        },
        "OCM": {
          "origin": "0x7e0",
          "size": "0x7d0"
        }
      },
      "max_address": "0xFFFFFFFF"
    },
    "Flash": {
      "memory_regions": {
        "Boot Image": {
          "origin": "0x0",
          "size": "0xFFFFFF",
          "links": []
        }
      },
      "max_address": "0xFFFFFFFF"
    }
  }
}

docs/example/A8_region_freespace_exceeds_height_higher_maxaddress_set

- 'max_address' is now set at a higher value than the max region size. This will cause excessive freespace values to be created (larger than the diagram height). To prevent illegible diagrams, the pre
-calculated value will be used instead. NOTE: draw_scale is adjusted to allow for potential voidregions
docs/example/A8_region_freespace_exceeds_height_higher_maxaddress_set.json 
{
  "$schema": "../../mm/schema.json",
  "name": "ZynqMP",
  "height": 874,
  "width": 614,
  "memory_maps": {
    "Global System Address Map": {
      "memory_regions": {
        "DDR Memory Controller": {
          "origin": "0x10",
          "size": "0x3e8"
        },
        "OCM": {
          "origin": "0x7e0",
          "size": "0x7d0"
        }
      },
      "max_address": "0xFFFFFFFF"
    },
    "Flash": {
      "memory_regions": {
        "Boot Image": {
          "origin": "0x0",
          "size": "0xFFFFFF",
          "links": []
        }
      },
      "max_address": "0xFFFFFFFF"
    }
  }
}

docs/example/A3_maxaddress_lower_than_memregions

- 'max_address is now set below the memregions but this will be overridden with the calculated largest value from the region data.
docs/example/A3_maxaddress_lower_than_memregions.json 
{
  "$schema": "../../mm/schema.json",
  "name": "ZynqMP",
  "height": 4961,
  "width": 3508,
  "memory_maps": {
    "Global System Address Map": {
      "memory_regions": {
        "DDR Memory Controller": {
          "origin": "0x10",
          "size": "0x3e8"
        },
        "OCM": {
          "origin": "0x7e0",
          "size": "0x7d0"
        }
      }
    },
    "Flash": {
      "memory_regions": {
        "Boot Image": {
          "origin": "0xbb8",
          "size": "0x7d0",
          "links": [
            [
              "Global System Address Map",
              "OCM"
            ]
          ]
        }
      },
      "max_address": "0x7d0"
    }
  },
  "link_head_width": 100
}

docs/example/A4_maxaddress_lower_than_memregions

- 'max_address is now set below the memregions but this will be overridden with the calculated largest value from the region data.
docs/example/A4_maxaddress_lower_than_memregions.json 
{
  "$schema": "../../mm/schema.json",
  "name": "ZynqMP",
  "height": 3508,
  "width": 2480,
  "memory_maps": {
    "Global System Address Map": {
      "memory_regions": {
        "DDR Memory Controller": {
          "origin": "0x10",
          "size": "0x3e8"
        },
        "OCM": {
          "origin": "0x7e0",
          "size": "0x7d0"
        }
      }
    },
    "Flash": {
      "memory_regions": {
        "Boot Image": {
          "origin": "0xbb8",
          "size": "0x7d0",
          "links": [
            [
              "Global System Address Map",
              "OCM"
            ]
          ]
        }
      },
      "max_address": "0x7d0"
    }
  },
  "link_head_width": 100
}

docs/example/A5_maxaddress_lower_than_memregions

- 'max_address is now set below the memregions but this will be overridden with the calculated largest value from the region data.
docs/example/A5_maxaddress_lower_than_memregions.json 
{
  "$schema": "../../mm/schema.json",
  "name": "ZynqMP",
  "height": 2480,
  "width": 1748,
  "memory_maps": {
    "Global System Address Map": {
      "memory_regions": {
        "DDR Memory Controller": {
          "origin": "0x10",
          "size": "0x3e8"
        },
        "OCM": {
          "origin": "0x7e0",
          "size": "0x7d0"
        }
      }
    },
    "Flash": {
      "memory_regions": {
        "Boot Image": {
          "origin": "0xbb8",
          "size": "0x7d0",
          "links": [
            [
              "Global System Address Map",
              "OCM"
            ]
          ]
        }
      },
      "max_address": "0x7d0"
    }
  },
  "link_head_width": 100
}

docs/example/A6_maxaddress_lower_than_memregions

- 'max_address is now set below the memregions but this will be overridden with the calculated largest value from the region data.
docs/example/A6_maxaddress_lower_than_memregions.json 
{
  "$schema": "../../mm/schema.json",
  "name": "ZynqMP",
  "height": 1748,
  "width": 1240,
  "memory_maps": {
    "Global System Address Map": {
      "memory_regions": {
        "DDR Memory Controller": {
          "origin": "0x10",
          "size": "0x3e8"
        },
        "OCM": {
          "origin": "0x7e0",
          "size": "0x7d0"
        }
      }
    },
    "Flash": {
      "memory_regions": {
        "Boot Image": {
          "origin": "0xbb8",
          "size": "0x7d0",
          "links": [
            [
              "Global System Address Map",
              "OCM"
            ]
          ]
        }
      },
      "max_address": "0x7d0"
    }
  },
  "link_head_width": 100
}

docs/example/A7_maxaddress_lower_than_memregions

- 'max_address is now set below the memregions but this will be overridden with the calculated largest value from the region data.
docs/example/A7_maxaddress_lower_than_memregions.json 
{
  "$schema": "../../mm/schema.json",
  "name": "ZynqMP",
  "height": 1240,
  "width": 874,
  "memory_maps": {
    "Global System Address Map": {
      "memory_regions": {
        "DDR Memory Controller": {
          "origin": "0x10",
          "size": "0x3e8"
        },
        "OCM": {
          "origin": "0x7e0",
          "size": "0x7d0"
        }
      }
    },
    "Flash": {
      "memory_regions": {
        "Boot Image": {
          "origin": "0xbb8",
          "size": "0x7d0",
          "links": [
            [
              "Global System Address Map",
              "OCM"
            ]
          ]
        }
      },
      "max_address": "0x7d0"
    }
  },
  "link_head_width": 100
}

docs/example/A8_maxaddress_lower_than_memregions

- 'max_address is now set below the memregions but this will be overridden with the calculated largest value from the region data.
docs/example/A8_maxaddress_lower_than_memregions.json 
{
  "$schema": "../../mm/schema.json",
  "name": "ZynqMP",
  "height": 874,
  "width": 614,
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}